1. Technical Field of the Invention
This invention related generally to digital signal processing and more particularly to encoding and decoding of data.
2. Description of Related Art
As is known, some radio frequency identification (RFID) systems utilize FM0 and/or FM1 encoding/decoding schemes, which are both bi-phase encoding schemes, for tag to reader communications. Other RFID systems may utilize various classes of encoding/decoding schemes based on the different standards such as EPC (Electronic Product Code) or ISO standards. As is further known, on the reverse tag-to-reader link, EPC Class 1 uses a four-interval bit cell encoding while EPC Class 1 Gen 2 and ISO 18000-6 standards use FM0 bi-phase encoding that has a state transition at every bit boundary. Also EPC class 0 encoding is based on frequency shift keying (FSK) encoding.
For FM0 a logic one is represented as a single state from bit boundary to bit boundary and a logic zero is represented as two states from bit boundary to bit boundary with one transition in the middle of the bit. For example, if the state of the previous encoded bit is −1 at the beginning of the data clock cycle for the present encoded bit, then, for a logic one, the state transitions to +1 and is maintained for the duration of the data clock cycle. If, however, the state of the previous encoded bit is +1 at the beginning of the data clock cycle for the present encoded bit, then, for a logic one, the state is transitioned to −1, which is maintained for the duration of the data clock cycle.
Continuing with the above example, if the state of the previous encoded bit is −1 at the beginning of the data clock cycle for the present encoded bit, then, for a logic zero, the state transitions twice during the data clock cycle: from −1 to +1 and then from +1 to −1. If, however, the state of the previous encoded bit is +1 at the beginning of the data clock cycle for the present encoded bit, then, for a logic zero, the state transitions twice during the data clock cycle: from +1 to −1 and then from −1 to +1. FM1 functions in a similar manner, but represents a logic zero with a single state from bit boundary to bit boundary and a logic one with a two states from bit boundary to bit boundary with one transition in the middle of the bit.
As mentioned, FM0 encoding is currently used, for example, for tag-to-reader communication in EPC Class 1 Gen 2 and ISO 18000-6 RFID standards. EPC class 1 encoding is similar to FM1 encoding, but includes additional transitions with the bit. For example, a logic zero is represented by state transitions at the boundaries of a bit and a single transition within the bit and a logic one is represented by state transitions at the boundaries of a bit and three transitions within the bit.
Conventional bi-phase decoders for FM0 and/or FM1 encoded data (e.g., as in EPC Class 1 Gen 2 and in ISO 18000-6) and for the four-interval bit cell encoded data (e.g., as in EPC Class 1) are bit by bit decoders that include a pair of matched filters, a data slicer, and an absolute value comparator. A first matched filter of the pair of matched filters has a filter response that corresponds to a single state transition and the second matched filter has a filter response that corresponds to a double state transition. The data slicer receives the outputs of the matched filters and produces a digital value representation thereof. The absolute value comparator compares the digital value representations to determine whether the encoded data represents a logic one or a logic zero.
As is generally accepted in the art of encoding/decoding, bit error rate (BER) is a function of signal to noise ratio and the encoding process. For bi-phase decoders, the encoding process is achieved by encoding a bit as either a single state within a data clock cycle, a dual state within a data clock cycle, or four states within a data clock cycle. Thus, from bit to bit, the resulting encoded value will be different. As is also generally accepted, the difference between encoded values can be measured using a Hamming distance (i.e., the number of bits that differ from encoded word to encoded word). A decoder's sensitivity (i.e., ability to accurately decode encoded data as the signal to noise ratio decreases) is a function of a minimum Hamming distance (i.e., the minimum number of bits that differ from any encoded word to any other encoded word), which for conventional FM0 and FM1 decoders is one. As such, for decoders, including EPC class 1, FM0 and FM1 decoders, the BER is a function of the signal to noise ratio and the minimum Hamming distance.
Therefore, a need exists for a method and apparatus of decoding bi-phase and/or FSK encoded data that improves bit error rate relative to signal to noise ratio performance, improves overall performance, and/or improves manufacturability.